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Learn about advanced micro-architectural security vulnerabilities and defenses in this conference session from CHES 2025, chaired by Chitchanok Chuengsatiansup. Explore cutting-edge research on hardware security threats that exploit processor micro-architecture features, including side-channel attacks, speculative execution vulnerabilities, and cache-based attacks. Discover the latest mitigation techniques and countermeasures being developed to protect against these sophisticated attack vectors. Gain insights into how modern processor designs can be exploited by malicious actors and understand the ongoing arms race between attackers and defenders in the realm of hardware security. Access comprehensive research findings through presented papers that detail novel attack methodologies, security analysis frameworks, and practical defense implementations for securing micro-architectural components against emerging threats.
