Hardware-Aware Neural Architecture Search Algorithm for Ultra-Low-Power Microcontrollers

Explore a technical talk that introduces a groundbreaking hardware-aware neural architecture search (HW NAS) algorithm designed specifically for ultra-low-power microcontrollers. Learn how this innovative approach automates neural architecture design while considering hardware constraints, achieving superior performance compared to human-designed solutions. Discover how the proposed technique makes HW NAS accessible to developers without requiring powerful GPU hardware, demonstrating state-of-the-art results in human-recognition tasks on the Visual Wake Word dataset using only a standard laptop configuration. Presented by Andrea Mattia Garavagno, a PhD student from Sant'Anna School of Advanced Studies of Pisa and University of Genoa, the talk details how this resource-efficient method produces tiny convolutional neural networks (CNNs) optimized for low-end microcontrollers, completing searches in just over 3.5 hours on modest hardware specifications.

Syllabus

Hardware-aware neural architecture search HW NAS, the process of automating the design of neural architectures taking into consideration hardware constraints, has already outperformed the best human designs on many tasks. However, it is known to be highly demanding in terms of hardware, thus limiting access to non-habitual neural network users. Fostering its adoption for the next-generation IoT and wearable devices design, we propose an HW NAS that can be run on laptops, even if not mounting a GPU. The proposed technique, designed to have both a low search cost and resource usage, produces tiny convolutional neural networks CNNs targeting low-end microcontrollers. It achieves state-of-the-art results in the human-recognition tasks, on the Visual Wake Word dataset a standard TinyML benchmark, in just :0 hours on a laptop mounting an 11th Gen IntelR CoreTM i7-11370H CPU @ 3. 30GHz equipped with 16 GB of RAM and 512 GB of SSD, without using a GPU.