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Learn EDR Internals: Research & Development From The Masters
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Watch this 15-minute conference presentation from OOPSLA 2025 that introduces arm-tv, a formal verification tool for validating translations between LLVM's intermediate representation and AArch64 assembly code. Learn how researchers from NVIDIA, University of Utah, and other institutions developed a checking validator that addresses correctness issues in LLVM's AArch64 backend, which contains over a million lines of complex C++ code performing optimizations similar to compiler middle ends including dataflow analyses, common subexpression elimination, and loop invariant code motion. Discover the technical advances made in translation validation, including enforcement of numerous ABI rules, extensions to the Alive2 verification backend to handle unstructured mixes of pointers and integers typical in assembly code, and investigation of tradeoffs between hand-written AArch64 semantics versus those derived mechanically from ARM's published formal semantics. Explore how this research tool successfully identified 45 previously unknown miscompilation bugs in LLVM's backend, most of which have been fixed in upstream LLVM, demonstrating the practical impact of formal verification methods in compiler development. Gain insights into the challenges of verifying highly optimizing compiler backends and the methodologies used to ensure correctness in critical compilation infrastructure used across the software industry.
Syllabus
[OOPSLA'25] Translation Validation for LLVM's AArch64 Backend
Taught by
ACM SIGPLAN