Introduction to eBPF Load-Acquire and Store-Release Instructions

Learn about the latest additions to the eBPF Instruction Set Architecture (ISA) in this 37-minute conference talk that introduces new load-acquire and store-release instructions designed to provide finer-grained memory ordering control for high-performance eBPF programs on weakly-ordered architectures like arm64. Discover how these BPF_ATOMIC instructions address the growing demand for sophisticated eBPF applications by moving beyond the default full memory barriers to more precise memory ordering semantics. Explore the encoding design of these new instructions and see practical demonstrations of their usage through C intrinsics with concrete examples. Dive deep into the comprehensive end-to-end implementation process, examining the necessary modifications made to the LLVM BPF backend and the upstream Linux kernel, including detailed coverage of changes to the verifier and Just-In-Time (JIT) compilers for arm64, x86-64, and riscv64 architectures. Gain insights into future development directions, including a proposed implementation of explicit eBPF memory barriers using nocsr kfuncs. Master these new eBPF ISA additions to build more feature-rich and performant eBPF applications with proper memory ordering control across different processor architectures.