Getting Moore with Less - How Chiplets and Open Interconnect Accelerate Cloud-Optimized AI Silicon

Explore the future of semiconductor design in this 20-minute conference talk where experts Mark Kuemerle from Marvell and Ramin Farjadrad from Eliyan discuss how chiplet technology is revolutionizing AI and computing infrastructure. Learn about the challenges facing traditional semiconductor scaling as AI demands increase in hyperscale computing environments, and discover how chiplet-based designs offer a modular solution to extend Moore's Law vertically. Delve into the essential technology components of chiplet architectures and examine open standards for die-to-die interconnect technologies, including NVLink, BoW, and UCIe, that are crucial for advancing high-performance AI computing and addressing reticle limitations in advanced process nodes.