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Explore a groundbreaking security research presentation from the 39th Chaos Communication Congress that investigates power-based denial-of-service attacks against cloud FPGAs. Learn how researchers approached FPGA power consumption from an unconventional perspective by maximizing rather than minimizing power usage, discovering methods to implement 6 GHz oscillators capable of theoretically dissipating 20 kW on large cloud FPGAs. Understand the development of fast ring-oscillators that bypass design checks during bitstream deployment and achieve 8 GHz toggle rates using glitch amplification techniques calibrated with time-to-digital converters. Examine practical attack demonstrations including power hammering that crashed AWS F1 instances by tripling power consumption to 300W, and localized hotspot attacks that concentrated 130W in less than 1% of available logic resources. Discover how these attacks, while unable to cause permanent chip damage, successfully aged routing wires to become up to 70% slower within days, effectively rendering FPGAs unsuitable for cloud deployment due to timing violations. Gain insights into the use of physical unclonable functions (PUFs) to analyze attacked FPGA behavior, thermal runaway effects, and device aging mechanisms. Learn about comprehensive countermeasures and design guidelines developed to protect against such attacks, including user design scanning, resource usage restrictions, runtime monitoring, and FPGA health checks that enable secure and reliable cloud FPGA operations.
