Novel Numerical Hardware Design Methodology - From Machine Readable Spec to Optimized RTL

Explore a novel numerical hardware design methodology in this 12-minute conference talk from ACM SIGPLAN. Delve into the challenges of specifying, implementing, and verifying numerical hardware for machine learning number formats and GPUs. Learn about FPCore, a language capable of representing any number format and precision, and its associated simulators for comparing against infinite precision results and exploring multi-precision design spaces. Discover a tool chain that automatically generates bit-accurate C-models from FPCore representations. Examine the limitations of current industrial high-level synthesis tools in optimizing behavioral models for power, performance, and area. Gain insights into a specialized tool for optimizing datapath designs and generating competitive RTL. The talk covers topics such as graphics hardware, optimizing hardware, specifications, simulation, C compilers, HMSS, and the Robot Tool Chain.