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Advanced VLSI Design and Verification

via SWAYAM Plus

Overview

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This course provides a comprehensive journey into mastering the essentials of VLSI from Digital Electronics to Verilog HDL and also aims in providing an indepth knowledge in Advanced VLSI verification concepts, covering a broad spectrum of modules essential for mastering in verification methodologies.

The course covers a range of modules designed to equip you with the skills needed for effective VLSI design and verification offering hands-on activities like labs, tool demos, projects, case studies and assignments to reinforce your knowledge and emerge ready to tackle VLSI challenges. The course includes a comprehensive exploration of RISC-V architecture and essential preparation for interviews.

Intended audience

ASIC Design Engineer, VLSI Design Engineer, RTL Design Engineer, VLSI Verification Engineer, ASIC Verification Engineer, SoC Verification Engineer, Design Verification Engineer

Prerequisites

  • Prior knowledge in Basic electronics Competency level - Basic

Assessment & certification

  • Assessment fee: Included — no extra fee
  • Assessment mode: Online
  • Assessment type: MCQ
  • Assessment provider: Maven Silicon
  • Certificate provider: SWAYAM Plus and Maven Silicon

NCrF level: 7 (NCrF credit-eligible)

Syllabus

  • Week 1: VLSI SoC Design
  • Week 2: Digital Electronics
  • Week 3: Static Timing Analysis
  • Week 4: Linux Operating System
  • Week 5: Verilog HDL
  • Week 6: Advanced Verilog and Code Coverage
  • Week 7: FPGA Architecture
  • Week 8: CMOS Fundamentals
  • Week 9: Pilot Project - RTL Design
  • Week 10: ASIC Verification Methodologies
  • Week 11: SystemVerilog HVL
  • Week 12: Business Communication
  • Week 13: PERL Scripting
  • Week 14: SystemVerilog Assertions
  • Week 15: Universal Verification Methodology
  • Week 16: Lab Exercises, Assignments and Case Studies
  • Week 17: Reference Materials
  • Week 18: Lab setup guides
  • Week 19: EDA Tool Demos
  • Week 20: Pilot Project - RTL Verification
  • Week 21: RISC-V RV32I Multi stage pipelined processor RTL Verification Project
  • Week 22: Assessments

Taught by

Maven Silicon Experts

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