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Explore a 41-minute conference talk from the 38th Chaos Communication Congress (38C3) that delves into the development of the first fully open-source FABulous FPGA chip. Learn about the groundbreaking achievement of building complex chips using only open-source tools, IPs, and process design kits. Discover the technical specifications of this Skywater 130nm FPGA, featuring 672 LUTs, 6 DSP blocks, 8 BRAMs, and 12 register file primitives - enough power to run a small RISC-V system. Understand how the FABulous framework integrates various open-source projects like Yosys, nextpnr, Verilator, OpenRAM, and OpenLane tools to create this innovative design. Gain insights into the unique features including partial reconfiguration capabilities and a compact board design that fits within an audio cassette case. Whether new to FPGAs or an experienced engineer, gain valuable knowledge about open-source FPGA chip design principles, industry comparisons, and the current state of open hardware development tools.
