Design Decisions Behind the First Open-Everything FABulous FPGA

Explore a 41-minute conference talk from the 38th Chaos Communication Congress (38C3) that delves into the development of the first fully open-source FABulous FPGA chip. Learn about the groundbreaking achievement of building complex chips using only open-source tools, IPs, and process design kits. Discover the technical specifications of this Skywater 130nm FPGA, featuring 672 LUTs, 6 DSP blocks, 8 BRAMs, and 12 register file primitives - enough power to run a small RISC-V system. Understand the innovative design aspects, including partial reconfiguration capabilities and a unique board design that fits within an audio cassette case. Gain insights into the FABulous framework's integration with various open-source projects like Yosys, nextpnr, Verilator, OpenRAM, and OpenLane. Compare industry FPGAs with this open-source alternative while examining crucial design decisions and optimizations for area cost and performance. Whether new to FPGAs or an experienced engineer, gain valuable knowledge about open-source FPGA chip design technology and the capabilities of open tools in building complete FPGA ecosystems.