Using DPDK as an Offload Engine for P4 SmartNIC Applications

Learn about leveraging DPDK as an offload engine for P4 SmartNIC applications in this technical presentation. Explore how DPDK can be utilized to handle complex packet manipulation functions while complementing P4's high-performance networking capabilities. Discover the architecture and implementation details of a P4-based SIIT-DC NAT64 translator built on FPGAs, which achieves 100Gbps line rates for Legacy IP to IPv6 translations. Understand the practical approach of using DPDK as a side-car application to manage intricate packet translations, particularly for ICMP responses, when P4's inherent limitations require additional processing power. Gain insights into the development workflow for integrating these technologies and see how this combination can enhance network application performance across various CPU architectures including x86, POWER, and ARM processors.