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Explore hardware-aware quantum error correction strategies in this 50-minute conference talk from IPAM's Bridging the Gap Between NISQ and FTQC Workshop. Delve into the critical importance of designing quantum error correction (QEC) protocols that account for specific qubit hardware properties to optimize limited quantum resources across near, medium, and long-term applications. Examine the practical challenges of qubit reset requirements in syndrome extraction circuits, where textbook QEC demands high-fidelity qubit resets after measurement—a technically demanding process. Discover theoretical and simulation results that demonstrate how avoiding qubit resets affects both quantum memory performance and logical operations. Learn about two innovative syndrome extraction circuits specifically designed to perform effectively in no-reset regimes, offering practical solutions for current hardware limitations. Gain insights into the intersection of theoretical quantum error correction principles and real-world hardware constraints that shape the development of fault-tolerant quantum computing systems.
