Using P4 NICs for Resilient Scale-Out GPU Interconnect

Explore how P4 programmable NICs enable resilient GPU interconnects for AI workloads in this keynote presentation by AMD's Corporate VP of Engineering. Learn about the critical need for hardware-based solutions that deliver low latency and high throughput for GPU interconnects in scale-out Ethernet fabrics. Discover how the industry is standardizing packet processing, memory transfers, message processing, reliability, and multipathing technologies to meet AI transport demands. Understand why designing programmable networks that anticipate and gracefully handle inevitable failures is more practical than pursuing perfect reliability as network components multiply across cables, NICs, switches, and transceivers. Examine AMD's approach to leveraging P4 technology for building robust solutions that overcome network failures through multi-plane architecture and advanced failure-handling mechanisms. Gain insights into how P4 capabilities demonstrate that network data plane programmability serves as a foundational requirement in today's demanding and unforgiving AI environments.