Explore the intricacies of designing a RISC-V CPU in this comprehensive 40-minute lecture from the 37C3 conference. Delve into various aspects of CPU architecture, including out-of-order execution, multi-core processing, memory coherency, and security measures. Learn how to run Linux and Debian on an FPGA using the recently developed NaxRiscv core, a free and open-source RISC-V softcore. Gain insights into hardware description languages, CPU design principles, information leak prevention (Spectre), memory coherency challenges, Linux and Debian system requirements, and debugging and simulation techniques. Presented by Dolu1990, this talk provides a thorough overview of the technical aspects involved in open CPU and SoC design, from hardware fundamentals to operating system implementation.