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Explore Cuttlefish virtual device platform for Android development and the Generic Android Boot solution leveraging EFI, including current state and future developments.
Explore the challenges and strategies for achieving MISRA compliance in open-source software for functional safety certification, with insights on effective deviation approaches and type model implementation.
Explore Huawei's implementation of Confidential Device Assignment (CoDA) for legacy PCIe devices in Confidential Virtual Machines, using virtCCA and PCI Protection Controller to enable high-performance applications.
Explore the design space, security tradeoffs, and standardization of Attested TLS protocols for confidential computing, with insights on best practices for Arm CCA ecosystem implementation.
Discover how the Xen hypervisor is advancing toward safety certification for automotive and industrial standards, with key developments in MISRA C compliance, testing infrastructure, and safety requirements implementation.
Explore how virtio-msg transport enables virtio devices between Xen guests running on heterogeneous x86 and ARM CPU clusters, including PCIe implementation, QEMU and Linux integration.
Explore the Virtio-msg protocol implementation and how it interfaces with FFA to connect pVM with host and trustzone via pKVM in virtualized systems.
Explore libkrun, a Rust-based VMM library providing virtualization-based process isolation with minimal boot time and small footprint, used for AI inference, gaming, confidential computing, and container management.
Explore Virtio-msg, a new transport layer enabling Virtio to work across diverse environments like RTOS co-processors, secure TEEs, and between different CPU architectures via PCIe.
Explore the intersection of geopolitics and technology as Amanda examines how global shifts impact AI, open source software, and collaborative tech environments.
Discover how to optimize MPI/OpenMP job performance with Linaro Forge's Thread Affinity Advisor, focusing on proper thread affinity configuration to prevent silent performance degradation, especially when porting to new systems.
Explore SIMD programming models across ARM (NEON & SVEx) and X86 (SSEx, AVXx) architectures, comparing features, optimization techniques, and implementation challenges for performance enhancement in various computing platforms.
Explore the Grace Hopper superchip architecture and how it enables efficient scaling of HPC codes and AI workloads, including real-world implementations and debugging with Linaro Forge.
Discover practical strategies for optimizing performance when migrating HPC workloads from x86 to Arm architecture, focusing on system alignment, instruction set optimization, and memory access patterns.
Discover how to accelerate Generative AI workloads on Arm Neoverse using KleidiAI's 4-bit weight-only kernels integrated with PyTorch, achieving 66 tokens per second on Llama 2 models for cost-effective, high-performance AI deployment.
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