Stanford Seminar - Neuromorphic Chips - Addressing the Nanostransistor Challenge

This seminar examines how neuromorphic chips address nanoscale transistor reliability challenges by combining analog dendritic computation with digital axonal communication. It discusses Neurogrid, TrueNorth, the Neural Engineering Framework, spiking-neuron models, and neuromorphic control applications.

Syllabus

Introduction.
Acknowledgments.
A dollar bought more and more transistors until 2014.
Beware of potholes!.
Accidents happen!.
Combining digital communication with analog computation.
Digital versus Analog versus Neuromorphic.
Neuromorphs' Five-Point "Secret" Master Plan 1. Implement dendritic computation with subthreshold analog.
Overlapping dendrites eliminate axon's terminal branches.
Hierarchical axonal branching minimizes wiring.
Neurogrid's overlapping dendrites and hierarchical axons.
Neurogrid versus TrueNorth.
What is the "VHDL" neuromorphic chips? 1981: Wiring Gates.
The Neuromorphics Project.
Nengo, Neuromorph, and Brainstorm.
The Neural Engineering Framework (NEF).
NEF vesus Conventional Neural Network.
Approximating dynamic transformations with NEF.
SPAUN: First whole-brain model built with spiking neurons.
Vector rotation example.
Works on a neuromorphic chip!.
Robot-arm controller video.