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Explore hardware security validation techniques in this 32-minute Black Hat conference talk by Joseph FitzPatrick. Delve into the world of secure hardware development, comparing it to the more established software security processes. Examine pre- and post-silicon validation methods applied to open-source core designs, and discover real-world Verilog security vulnerabilities along with their resolutions. Learn about various hardware security bug categories, state machine vulnerabilities, and commercial projects related to hardware security. Gain insights into tools like OpenRisk and Jasper Gold, and understand the importance of secure development processes for integrated circuits.
Syllabus
Introduction
Who am I
Overview
Hardware Security
Software Security
Verilog
Open Risk
State Machines
Tap States
One Hot or Not
ID Code Select
Pause Dr State
MSP430
Amber
HDL Verilog
Better Lock
Physical Vice
Commercial Projects
OpenRisk
Jasper Gold
Free copy
Coherent denial of service
Taught by
Black Hat