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Overview
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Explore how SerDes (Serializer/Deserializer) technology must evolve to meet the demanding requirements of scalable AI architectures in this 14-minute conference talk from Conf42 KN 2025. Discover the significant impact AI workloads have on interconnect designs and understand the critical challenges in signal integrity that arise when scaling AI systems. Learn about cutting-edge innovations in SerDes design that address these challenges, including the integration of machine learning and advanced techniques to optimize performance. Examine architectural tradeoffs and configurability options that enable flexible SerDes implementations for different AI use cases. Understand power efficiency strategies essential for sustainable AI infrastructure and explore holistic solution approaches that consider the entire system ecosystem. Gain insights into future directions for SerDes technology in AI applications and key takeaways for implementing scalable interconnect solutions in modern AI architectures.
Syllabus
00:00 Introduction to Scalable AI Architectures
00:29 Agenda Overview
00:40 AI Workload Impact on Interconnect Designs
02:17 Challenges in Signal Integrity
05:18 Innovations in SERDES Design
06:22 Machine Learning and Advanced Techniques in SERDES
07:39 Architectural Tradeoffs and Configurability
09:17 Power Efficiency Strategies
10:12 Holistic Solution Strategies
12:24 Future Directions in SERDES for AI
13:56 Key Takeaways and Conclusion
Taught by
Conf42