FPsPIN - An FPGA-based Open-Hardware Research Platform for Processing in the Network

Explore an FPGA-based open-hardware research platform designed for processing data directly within network infrastructure through this 14-minute conference presentation. Learn about the motivation behind network offloading and how processing incoming data on network hardware instead of CPUs can reduce latency by eliminating the need for data to be deposited into main memory while freeing up CPU cycles. Discover the sPIN project's approach to enabling user-defined handlers that execute upon packet arrival, and understand how FPsPIN provides a full FPGA-based implementation of sPIN concepts. Examine practical applications through offloaded MPI datatype processing demonstrations that achieve a 96% overlap ratio, and gain insights into UDP ping-pong examples, latency evaluations, and the overlap of communication and computation. Access detailed technical analysis covering system architecture, evaluation methodologies, and performance benchmarks that showcase FPsPIN's potential as an adaptable open-source research platform for conducting end-to-end experiments on smart network interface cards in high-performance computing environments.