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Explore fault analysis techniques in cryptographic hardware and embedded systems through this conference session from CHES 2025, chaired by Praveen Vadnala. Delve into cutting-edge research on fault injection attacks, fault tolerance mechanisms, and countermeasures designed to protect cryptographic implementations from physical manipulation. Learn about the latest developments in fault-based cryptanalysis, including differential fault analysis, safe-error attacks, and fault sensitivity analysis across various cryptographic algorithms and hardware platforms. Examine practical case studies demonstrating how faults can be exploited to extract secret keys or bypass security measures, while also discovering defensive strategies and design principles for building fault-resistant cryptographic systems. Access comprehensive research papers and presentation slides to deepen your understanding of this critical aspect of hardware security and side-channel analysis.
