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This conference talk presents PIMLex, a high-performance learned index that leverages Processing-in-Memory (PIM) technology to overcome memory bandwidth and latency limitations in conventional computer architectures. Learn how researchers from Nankai University designed a decoupled two-layer structure that combines PIM's powerful data processing capabilities with conventional DRAM's large capacity. The presentation explains the PIM-friendly model structure that minimizes computational tasks challenging for PIM and introduces a hotness-aware replication mechanism ensuring load balancing across multiple PIM modules. Discover how PIMLex implementation on UPMEM commercial PIM hardware achieved 36.5× higher throughput than PIM-based learned index baselines and 2.2× higher performance than DRAM-based ALEX. This 17-minute talk from FAST '25 demonstrates significant advancements in storage system index structures through innovative PIM integration.
