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Explore the unprecedented security challenges and solutions involved in securing NVIDIA's proprietary RISC-V ecosystem that has shipped over 1 billion cores in this DEF CON 33 conference talk. Learn how NVIDIA transitioned from its internal Falcon microprocessor to a RISC-V based architecture starting in 2016, with each chipset now containing 10-40 cores across nearly all GPU products. Discover the custom software and hardware security architecture built from scratch to address unique challenges that existing security models couldn't solve, including a purpose-built Separation Kernel software, novel RISC-V ISA extensions like Pointer Masking and IOPMP, and innovative secure boot and attestation solutions. Understand how to future-proof a proprietary ecosystem against emerging threats through hardware-assisted memory safety implementations like HWASAN and MTE, control-flow integrity (CFI), and CHERI-like models. Gain insights into real-world security implementation at billion-core scale and examine NVIDIA's approach to preparing their RISC-V ecosystem for the evolving threat landscape.
