Hardware-Efficient Quantum Error Correction Using Concatenated Bosonic Qubits

Explore a 59-minute QuICS lecture examining hardware-efficient approaches to quantum error correction through concatenated bosonic qubits. Delve into a superconducting circuit experiment that demonstrates a logical qubit memory by combining encoded bosonic cat qubits with an outer repetition code. Learn how cat qubits provide passive protection against bit-flip errors while the repetition code handles phase-flip error correction. Examine experimental results showing how logical phase-flip errors decrease with code distance from 3 to 5, while logical bit-flip errors are suppressed by increasing cat-qubit mean photon numbers. Discover the achieved minimum logical error rates of 1.75(2)% for distance-3 codes and 1.65(3)% for distance-5 codes. Consider future prospects of cat-qubit architecture and potential pathways toward achieving algorithmically-relevant logical error rates in quantum computing systems.