Explore an open-source software-hardware co-design workflow called hls4ml, designed to empower scientific low-power machine learning devices. Learn about the essential features of this workflow, including network optimization techniques such as pruning and quantization-aware training. Discover how hls4ml supports domain scientists by interpreting and translating machine learning algorithms for implementation in FPGAs and ASICs. Gain insights into the expanded capabilities of hls4ml, including new Python APIs, quantization-aware pruning, end-to-end FPGA workflows, long pipeline kernels for low power, and new device backends with an ASIC workflow. Understand how these advancements in hls4ml aim to provide accessible, efficient, and powerful tools for machine-learning-accelerated scientific discovery across various application domains.